Lithe has produced FPGA systems with devices from Xilinx, Altera and Atmel. We have delivered systems that were used for networking, communications, control and signal processing. The work has included both delivering PCBs with integrated FPGAs and HDL designs for FPGAs.
Timing Closure and Constraints
To achieve stable performance, an FPGA must have valid timing constraints. These constraints must be met and accurately reflect the hardware of your system. Lithe engineers can help convert system requirements into workable designs, including timing constraints. Furthermore, the FPGAs must be coded with a good understanding of timing trade-offs. If not, the design will not achieve timing closure and require iteration and rework. This wastes time and money.